(1) Field of the Invention
The present invention relates to non-volatile semiconductor memories and methods of manufacturing the same. More particularly, the present invention relates to a non-volatile semiconductor memory that stores information by capturing electrons in a gate insulating film formed between a semiconductor substrate and gate electrode, and a method of manufacturing such a non-volatile semiconductor memory.
(2) Description of the Related Art
There have been non-volatile semiconductor memories that perform information read and write by locally capturing electrons in an insulating film having a charge capturing ability. In recent years, non-volatile semiconductor memories that store 2-bit information in each one memory cell have been developed from the conventional non-volatile semiconductor memories.
FIGS. 23A and 23B illustrate an example of a conventional non-volatile semiconductor memory. FIG. 23A is a sectional view of the conventional non-volatile semiconductor memory in a write operation, and FIG. 23B is a sectional view of the same memory in the read operation.
A non-volatile semiconductor memory 200 has a pair of impurity diffusion layers 202 and 203 formed on the surface areas of a p-type silicon semiconductor substrate 201. The impurity diffusion layers 202 and 203 function as the source and drain of the non-volatile semiconductor memory 200. A gate insulating film 204 is formed on top of the p-type silicon semiconductor substrate 201, and a gate electrode 205 is formed on the gate insulating film 204.
The gate insulating film 204 has a three-layer structure in which a first insulating film 204a made of a silicon oxide film, a charge capturing film 204b made of a silicon nitride film, and a second insulating film 204c made of a silicon oxide film, are laminated in this order.
With this non-volatile semiconductor memory 200, information write and read are carried out by locally capturing electrons in charge capture regions formed within the charge capturing film 204b in the vicinities of the impurity diffusion layers 202 and 203 at a reasonable voltage. In FIGS. 23A and 23B, a left bit region 206 and a right bit region 207 are shown as the charge capturing regions. The non-volatile semiconductor memory 200 can write and read 1 bit each in the left bit region 206 and the right bit region 207, which is 2 bits in total.
To write information in the left bit region 206 of this non-volatile semiconductor memory 200, a voltage of 5 V is applied to the impurity diffusion layer 202, a voltage of 0 V is applied to the impurity diffusion layer 203, and a voltage of approximately 8 V is applied to the gate electrode 205. By doing so, an inversion layer 208a is formed between the impurity diffusion layers 202 and 203, as shown in FIG. 23A, and channel hot electrons generated in the vicinity of the impurity diffusion layer 202 are captured in the left bit region 206, skipping the first insulating film 204a. 
To read information from the left bit region 206, the voltages reversed from the information write voltages are applied to the impurity diffusion layers 202 and 203. For example, a voltage of 0 V is applied to the impurity diffusion layer 202, and a voltage of 2 V is applied to the impurity diffusion layer 203. A voltage of approximately 5 V is applied to the gate electrode 205.
If electrons are captured in the left bit region 206, an inversion layer 208b is shut off due to the influence from the captured electrons, as shown in FIG. 23B, and the current does not flow between the impurity diffusion layers 202 and 203.
If electrons are not captured in the left bit region 206, electrons captured in the right bit region 207 do not have influence on operations of reading information from the left bit region 206. This is because, if electrons are captured in the right bit region 207, the inversion layer 208b partially disappears in the vicinity of the impurity diffusion layer 203, but the influenced range is narrower than the channel length, and the influence on the current is so small that it can be ignored. On the other hand, if electrons are not captured in the right bit region 207, the inversion layer 208b does not disappear, and a current corresponding to the applied voltages flow between the impurity diffusion layers 202 and 203.
The same applies to the case where the above electron holding conditions of the left bit region 206 and the right bit region 207 are reversed.
In recent years, there has been an increasing demand for higher performance and higher reliability in various types of smaller semiconductor devices equipped with non-volatile semiconductor memories of the above structure.
However, as the channel length becomes shorter with a reduction of the size of each semiconductor device, the ratio of the charge capturing region length to the channel length becomes higher. This fact has caused a problem that, when information is to be read from one bit region, the influence of electrons captured in the other bit region cannot be ignored.
FIGS. 24A and 24B illustrate an example of a conventional small-sized non-volatile semiconductor memory. FIG. 24A illustrates a situation in which an inversion layer has partially disappeared, and FIG. 24B illustrates a situation in which a deviation has been caused in the locations of the bit regions.
In a non-volatile semiconductor memory 300, the distance between a left bit region 302 and a right bit region 303 formed within a charge capturing film 301 is short, as the channel length is short.
In the case shown in FIGS. 24A and 24B, information is to be read from the left bit region 302 of the non-volatile semiconductor memory 300, when electrons are not captured in the left bit region 302, but are captured in the right bit region 303.
In this case, an inversion layer 304 of the channel region partially disappears in the vicinity of the right bit region 303, due to the negative electric field generated by the captured electrons, as shown in FIG. 24A. As the channel length becomes shorter, the ratio of the disappearing part of the inversion layer 304 to the channel length becomes higher. As a result, the current flowing between impurity diffusion layers 305 and 306 greatly decreases at the time of reading information from the left bit region 302, and an accurate read operation cannot be performed.
In this conventional structure, the charge capturing film 301 is formed on the entire area of the channel region. Because of this, when there is a change in the drain voltage or the gate voltage at the time of reading, the right bit region 303 that holds electrons might shift toward the left bit region 302, as shown in FIG. 24B. As a result, the effective channel length becomes shorter. This problem becomes more pronounced, when the distance between the bit regions that serves as the charge capturing regions becomes shorter with a further reduction of the channel length. This problem results in an inaccurate read operation for the same reason as the case of FIG. 24A.
To solve the above problem, the inversion layer 304 may be pinched off in front of the right bit region 303 at the time of reading information from the left bit region 302, so that the influence of the disappearance can be minimized. In doing so, however, a high voltage needs to be applied to the source and drain or the gate electrode. As a result, channel hot electrons are generated. When these electrons are captured in the charge capturing film 301, inaccurate write might be carried out at the time of reading.
Also, the above problem may be solved by narrowing the charge capturing regions through a reduction of the quantity of electrons to be captured in the charge capturing regions. In doing so, however, the reliability in data holding greatly decreases. For instance, in a case where electrons are captured in the left bit region 302 but not in the right bit region 303, a part of the inversion layer 304 in the vicinity of the left bit region 302 might not sufficiently disappear at the time of reading information from the left bit region 302, with the quantity of the captured electrons being small. This situation results in a problem that the current remains to flow.